WIT Press

Transitional Delay Fault Test Generation Using A Genetic Algorithm

Price

Free (open access)

Paper DOI

10.2495/AI960131

Volume

16

Pages

10

Published

1996

Size

65 kb

Author(s)

M.J. O'Dare and T. Arslan

Abstract

With the continuous technological advancements in digital electronic circuit technology devices are becoming even more complex, it is essential that a high level of operational reliability is maintained which is why there is always a requirement for new and improved test methodologies. A fault condition in a digital circuit may be the result of a manufacturing problem causing physical imperfection in the device, this imperfection may be open circuit or short circuit connections, or a flaw that changes other characteristics of the device. The propagation of a gate may be affected introducing a delay defect into the circuit, often creating timing problems, which have always proved difficult to detect. This paper presents a new approach to the generation of tes

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